Does the M560/M580 have a level 3 safety structure and software interface supporting RAM partitioning, flash partitioning, program flow monitoring, CPU working frequency monitoring, and CPU load monitoring?

The M560/M580 architecture utilizes dual microcontrollers as described in the safety manual. Although the microcontrollers do not support RAM partitioning, the complete independence of the two microcontrollers ensures that software errors on one controller cannot affect the other. Safety functions must be provided by the application software on each microcontroller to ensure independence. The OpenECU platform software provides APIs for full program flow and CPU loading diagnostics, as well as additional diagnostic information for overall CPU health such as clock diagnostics.

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